Cool Fusion: AMD's plan to revolutionise multi-core computing
Different cores for different chores
AMD's Fusion CPUs will not be mere system-on-a-chip products, the chip company's chief technology officer, Phil Hester, insisted yesterday. Instead, the processor will be truly modular, capable of forming the basis for a range of application-specific as well as generic CPUs, from low-power mobile chips right up to components for high-performance computing systems.
Start equipping CPUs with their own graphics cores and it certainly sounds like you'll have an SoC part on your hands. Not so, says Hester. Fusion will not just link monolithic components on a single die - the traditional SoC architecture - but will break these components down into more basic parts that can be mixed and matched as needed then linked together using AMD's Direct Connect technology.
According to Hester, Fusion's roots lie much further back than discussions between AMD and ATI about graphics technology more tightly connected to the CPU, let alone the more recent takeover negotiations. When 'Hammer', AMD's original 64-bit x86 architecture, was in development, AMD designed the single-core chip to be able to be equipped with a second core as and when the market and new fabrication technologies made that possible. Going quad-core will require a suitably re-tailored architecture, as will moving up to eight cores and beyond to... well, who can say how many processing cores CPUs will need in the future?
Or, for that matter, what kind of cores? According to Hester, this is a crucial question. AMD believes building better processors will soon become a matter not of the number of cores the chip contains but what specific areas of functionality each of those cores deliver.
To build such a chip, particularly if you want to be able to change the mix of cores between different products based on it, you need a modular architecture, he says. So Fusion will break down the chip architecture into its most basic components: computational core, clock circuitry, the memory manager, buffers, crossbar switch, I/O, level one, two and three cache memory units, HyperTransport links, virtualisation manager, and so on - then use advanced design tools to combine them, jigsaw-fashion, into chips tailored for specific needs. Need four general purpose cores, three HT links but no L3 cache? Then choose the relevant elements, and let the design software map them onto the die and connect them together.
At the time, says Hester, AMD didn't necessarily include a graphics core among its list of processor pieces, but it certainly allowed for the possibility other elements might need to be added on, not only 3D graphics rendering but also media processing, for example. However, it quickly became clear the GPU would be the part most suited to this shift, not least because of the graphical demands Windows Vista is going to make in initial and future releases.
Developing an entirely new programmable GPU core in-house is a risky endeavour, Hester admits. It's an expensive process and if you get it wrong, you weaken your entire processor proposition when CPU and GPU are as closely tied as the Fusion architecture mandates.
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