Intel to debut 9MB Itanic 2 'on Monday'
Chip giant gears up for giant cache release
Intel will release an Itanium 2 processor with 9MB of L3 cache for four-way systems and up next Monday, according to reports on the web.
Sources familiar with the chip giant's plans have separately alerted us to the possibility of an Itanium announcement in the very near future.
Intel has never hidden the fact it's preparing a Itanium 2 with such a large cache - the part's codenamed 'Madison 9M' - and the processor has been on Intel's server chip roadmap for some time.
Last August, Madison 9M was still being listed for a Q3 release, though obviously that's slipped a bit. The part said to be due for an announcement next Monday, will clock at up to 1.7GHz and also be made available in 6MB and 4MB versions. All the CPUs operate over a 400MHz frontside bus and are fabbed at 130nm. Current Itanium 2 use the same FSB, but clock at up to 1.6GHz with 3MB of L3, or 1.5GHz for the 6MB L3 version.
Intel may also announce 'Fanwood' - an updated two-way Itanium - next week, along with a version of the chip for low-power systems, 'Fanwood LV'. The two versions are believed to have 4MB and 3MB of L3, respectively. The LV release will run over a 400MHz FSB, but the regular Fanwood is understood to be able to support a 533MHz bus.
Indeed, a version of Madison 9M supporting a 667MHz FSB is expected early next year, though given the delay the 400MHz FSB part has experienced, the faster-bus model may not arrive until Q2 2005 now.
That part will take the Itanium 2 family through to mid-2005, when 'Montecito', Intel's dual-core Itanium 2 with 24MB of L3, is due to ship. So too is 'Millington', the dual-core part for two-way systems. ®
Itanium sales fall $13.4bn shy of $14bn forecast
Intel Itanic prices chopped
Intel: common Xeon, Itanic chipset by 2007
First dual-core Itanic to sport 24MB of cache
Intel's Otellini promises Year of Itanium
Sponsored: 2016 Cyberthreat defense report