Intel 'Nocona' details emerge on mobo display

Computex Intel's 'Nocona' 64-bit Xeon DP chip will launch at 3.6GHz when it is officially unveiled on 27 June.

The part - which will be fabbed at 90nm - will finally bring the Pentium 4's 800MHz frontside bus to the two-way server platform. That's been assumed for some time, but it's certainly nice to have it down in black and white, courtesy of sales collateral distributed by Asus at Computex.

Said documentation reveals the chip will ship with just 1MB of L2, and has the clock speed down as "3.6GHz+".

Asus will offer a range of five Nocona boards, one with the 'Tumwater' chipset and two with 'Lindenhurst' parts: Lindenhurst and Lindenhurst-VS. The first and last use Intel's upcoming 6300ESB South Bridge, which provides dual-port Serial ATA support. All three chipsets support dual-channel memory architectures using ECC DIMMs. Tumwater and Lindehurst support 400MHz DDR 2 SDRAM; Lindenhurst-VS uses 333MHz DDR.

Xeon has taken some time to get its FSB lifted to 800MHz. The next jump should come more quickly, with 1066MHz pencilled in for mid-2005 to 2006. The Pentium 4 is expected to go 10 1066MHz later this year. ®

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