ARM unveils multi-core chip design
License now, punch out silicon in Q2 2005
ARM yesterday announced that it is ready to sign licensees for its first multi-core processor, but it admitted it will be a year before silicon derived from the technology begins to appear.
The multi-core design, dubbed the MPCore, was co-developed with NEC to support single-core to four-core processors. Based on the ARMv6 architecture, each core also integrates more recent technology, including ARM's AltiVec/3DNow/SSE-style 'single instruction, multiple data' (SIMD) multimedia processing extensions and the company's Jazelle Java acceleration circuitry.
Pitched at mobile applications, MPCore features a power controller that can shutdown unused cores, taking the consumption down to 0.57mW/MHz for a 130nm CPU. That figures excludes power consumed by the chip's L2 caches, which maintain coherency using a "modified" version of the MESI (Modified, Exclusive, Shared, Invalid) protocol, ARM added.
The MPCore Energy Manager can reduced power consumption by up to 85 per cent, ARM said. It didn't say from what baseline that reduction is measured - presumably from four separate ARM CPUs.
The design supports both symmetric and asymmetric multi-processing, said ARM, with both techniques backed by a variety of operating systems. ARM has begun offering a Linux 2.6-based development system.
In addition to developing the MPCore, NEC said it will use the part in hardware products of its own that target the consumer electronics, automotive and mobile markets. ®
AMD restates dual-core CPU scheme
Intel's Whitefield goes Banias in 2006
Intel plots 4MB L2, 64-bit desktop CPU
First 65nm IBM PowerPC chip to be dual-core
First dual-core Itanic to sport 24MB of cache
Sponsored: Benefits from the lessons learned in HPC