EC to fund Euro 45nm process with €24m grant
Building 'Euro CMOS backbone'
The European Commission (EC) is to grant €24m ($29.7m) to Europe's semiconductor makers to aid the development of CMOS process technologies at 45nm and beyond, it was announced today.
The EC funding will be used to launch NanoCMOS, a project which aims to "pioneer the necessary changes in materials, processes, device architectures and interconnections to keep pushing the limits of semiconductor performance and density", the organisation said.
That will allow the European chip industry to "keep its place among the few worldwide leaders in the field".
NanoCMOS is backed by Europe's largest chip makers: Infineon, STMicroelectronics and Philips. It has strong links with a wide range of research institutions from across Europe, from academia and from a number of small, specialist chip technology firms. The partners are also investing in the project, though the extent of that funding was not disclosed.
The R&D project's charter calls for the demonstration of a 45nm logic technology on 300mm wafers some time next year, with 32nm to follow in 2007. The project's 22nm will follow in due course. Validation of the 45nm technology on 300mm wafers is expected to be achieved in 2006. Essentially, it is building a standard 45nm process - a "CMOS backbone" - which can be shared throughout Europe's semiconductor industry through to 2010.
"Because of its ambitious objectives and committed resources that are mobilized for a common goal, NanoCMOS represents a unique opportunity for Europe to become the leading center for nanoelectronics, while supporting academic research and helping its indigenous industrial players to hone their competitive edge," said Dr Guillermo Bomchil, NanoCMOS' project leader, in a statement.
NanoCMOS will be headquarted at STMicro's Crolles, France facility, which is likely also to host the 45nm on 300mm wafer development fab. That fab will be jointly owned by STMicro, Philips and Infineon.
Infineon is currently partnering with IBM, Chartered Semiconductor and now Samsung on the development of 65nm CMOS logic technology. That project, based in IBM's East Fishkill, New York facility is expected to explore 45nm processes in due course. ®