Nvida preps nForce for Transmeta TM8000
Doddle to do, thanks to HyperTransport
Nvidia is set to launch a version of its nForce chipset to support Transmeta's upcoming TM8000 processor, codenamed Astro.
So claims web site NFI, attributing a 'high reliability' rating to the rumour.
A bizarre choice, you might think. Certainly, Transmeta has had limited success with its x86 compatible, low power consumption, mobile-oriented processors to date and is pinning its hopes on TM8000, the first of a new generation of Crusoe chips, though it won't be branded as such.
Now, the chip includes 400MHz DDR, AGP 4x and HyperTransport controllers on the die. For Nvidia, that essentially means all it needs is to support the processor is a South Bridge part, easily connected via an HT bus. It has some experience in offering such a one-chip solution: the Opteron-oriented nForce 3 Pro. It will be undoubtedly offering something similar for the Athlon 64 come September.
Transmeta products in the past have typically been used with VIA South Bridge parts, specifically the VT82C686A/B line, part of the Apollo KT133A chipset and other older AMD-oriented parts.
The company undoubtedly wants something rather more up-to-date than that part for the TM8000, and it's no surprise, given the reputation Nvidia has for top-performance AMD-oriented chipsets, that it might want to tap the graphics company's chipset expertise for TM8000.
Transmeta is expected to pitch the TM8000 against Intel's Pentium M and Centrino platform, so it needs some impressive chipset technology - not to mention Wi-Fi support - to complete the picture.
The TM8000 is due to go into volume production until this quarter, fabbed by Taiwan Semiconductor using a 0.13 micron process, so NFI's claim is certainly timely. The chip sports a 256-bit VLIW (Very Long Instruction Word) engine - on top of which runs a new generation of its Code Morphing x86 compatibility software - and an upgrade to Transmeta's LongRun power-saving technology. A revised architecture allows the TM8000 to execute up to eight instructions per clock. ®