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IBM to use Power4 across the pSeries line In 2002?

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How ready is IBM to put the Power4 processors across its pSeries and iSeries lines of midrange and enterprise servers? Apparently a lot more ready than many of us had been led to believe, Timothy Prickett Morgan writes.

According to IBM chief financial officer John Joyce, who was speaking to Wall Street analysts during the company's conference call discussing Big Blue's fourth quarter financial results last week, IBM is preparing to put the Power4 chips into its low-end and midrange pSeries servers by the end of 2002.

Under plans that IBM was kicking around last year, customers and business partners were told that IBM would crank up the clock on the current 750MHz S-Star PowerPC processors, perhaps to 800MHz or maybe even 900MHz.

But the unofficial word from within IBM as the year was turning was that IBM wants to roll the Power4 processor into as many products as possible, as soon as possible. IBM plans to sell new S-Star machines to customers throughout 2002, and that might be extended a little longer. Upgrades for these machines will be available for some time after that, perhaps 12 to 24 months, depending on IBM's mood and the availability of chip and related components.

Some people expect IBM to use the "Cell" Power processors being co-developed with Sony and Toshiba for consumer devices and games machines in low-end and midrange pSeries servers. This may or may not happen.

The technical specs of these chips are unknown, except that IBM says they will have teraflops of number-crunching power. While they may not be designed specifically for servers, at high enough clock speeds, they could run inefficiently in a server and because of volume economics on the chips, still yield a great bang for the buck on file, print and Web serving. If these chips see the light of day IBM has committed $400m over five years to design the Cell chip in its Austin labs--they could pack a lot more wallop than an S-Star PowerPC chip.

At the high-end of the pSeries line, IBM's next generation of servers, due in 2003, is a crank on the just-announced Regatta line using the Power4-II processors. These are expected in October 2002, in fact. These second-generation Regattas will support 16 chips each with two processors per chip (32 processing elements with a shared L2 cache) running at around 1.5GHz to 1.6GHz, 384GB of main memory and up to 100TB of storage; the current Regattas have 16 chips, supplied with either one or two CPUs, running at 1.1GHz or 1.3GHz and support 256GB of main memory and 36TB of storage.

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