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Motorola completes 1.6GHz PowerPC G5

Apple readies G5 Power Macs with Bluetooth, USB 2.0, DDR SDRAM support for January

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Exclusive Motorola taped out the PowerPC 8500 - aka the G5 - last week and is set to go into volume production real soon now at speeds of up to 1.6GHz - a higher clock speed than AMD's latest-generation, 'Palomino' Athlon is expected to ship at - The Register has learned.

So claim sources said to be close to Apple, at any rate. The new CPU will be offered at 800MHz, 1GHz, 1.2GHz, 1.4GHz and 1.6GHz, and while the first two are nominally aimed at the embedded space - the others are aimed straight at the desktop, we hear - we can see Apple using them as to transition over from the top end G4, the PowerPC 7450.

Getting to those clock speeds involved increasing the G5's pipeline from the 7450's seven stages to ten. The part is capable of exceeding 2GHz, we're told, but the initial batch of shipping clock speeds suggests that the either the yield or the stability of 2GHz parts isn't high enough to ship chips at that speed.

High clock speeds also mean high power dissipation, but Motorola has nicely countered it by fabbing the G5 using silicon-on-insulator technology, leading to a power dissipation of 26W at 1.4GHz, our source tells us. By comparison, the 7450 draws 14W at 533MHz. Our source had no word on what process Motorola will use for the part, but we reckon 0.13 micron with copper interconnects. The transistor count will be 58 million gates.

That's said to be twice the 7450's transistor count, which makes us wonder what Motorola will do with the extra gates. The longer pipeline and additional instruction units will account for a lot of it, but we also wonder if the chip will feature a built-in memory manager, something Motorola has been talking about of late.

Beyond far higher clock speeds, the G5 will be a full 64-bit chip, but will support 32-bit addressing at full speed. The part will also support multi-processor configurations.

The G5 will sport a 400MHz frontside bus - like Intel's Pentium 4, though its performance could be limited by whatever memory technology Apple connects to it across the system bus.

Speaking of which, we hear work is progressing on a new chipset, designed for the G5, which will support up to 16GB of DDR SDRAM. What type of DDR, we don't yet know. The chipset's south-bridge part - ie. the chip that primarily handles I/O - will support USB 2.0 and the Bluetooth wireless connectivity standard, in addition to the familiar 1394 - up to 800MBps? - and 802.11 (aka AirPort).

Incidentally, given Apple's recent statement of support for AMD's HyperTransport bus technology, and its presence on the HyperTransport Consortium's founder member list, we reckon that the new chipset may also use HT for chip-to-chip communications, but as yet this is unconfirmed.

We don't know the ship date either, though we've been told that Apple is shooting to get boxes out for a January launch. If Motorola is sampling the G5 now or is about to, then we'd estimate that volume won't begin until early to mid Q1 2002, which would enable Apple to launch at Macworld Expo San Francisco and ship the higher end boxes in, say, February, as it's done before.

Apple will launch Mac OS X 10.2 around the same time, we're told, and offer it as a 64-bit version. To do so would surely limit users of older hardware to 10.1 and its updates, but that hasn't stopped the company making such moves in the past. The G5's 32-bit support will allow apps to be carried forward, and developers have been told they will be able to make '64-bit clean' apps with a simple recompile.

If our source's claims are accurate, the timing would be right for Motorola to unveil the new chip at this autumn's Microprocessor Forum, on 15 October. ®

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