Motorola introduced its 0.13 micron process technology today, with the promise that it will use the technology in its PowerPC line.

The chip maker calls the process HiPerMOS7 - HiP7, for short - the technology is essentially a die-shrink, down from Motorola's current 0.18 micron process. HiP7 uses copper interconnects, along with silicon-on-insulator techniques.

Motorola also touted with HiP7's suitability for system-on-a-chip design, but reading between the lines it's clear this is just its way of selling the process' smaller transistor size. Smaller transistors mean more functionality can be built into a given die size. Motorola noted the ability to build in analogue technology and radio frequency circuitry onto the die alongside the digital logic, a nod toward cellphone and wireless networking equipment vendors keen to cut down on the number of chips they use.

Motorola also highlighted HiP7's modular approach to design, primarily to emphasise how the process can be used for a variety of different kinds of chip.

And that includes the PowerPC. Motorola is currently sampling 0.13 micron versions of its embedded processors, and expects to begin volume production in Q3 at its Austin, Texas fab. That's round about the same time Intel will begin volume shipments of its first 0.13 desktop part, the next generation of the Pentium III, codenamed Tualatin. How soon HiP7 is extended to the PowerPC line remains to be seen. Sooner rather than later, if it gets a push from Apple. ®