Intel's Jackson will offer 2 chips for 1
Skating paradigms to cool overheating Gelsinger
Updated Intel will be introducing SMT into their Foster chips in the summer, sources close to the project have confirmed to The Register. And with Project Jackson, its codename at Satan Clara, Intel will break with its traditional approach to microprocessor design by introducing SMT, or 'simultaneously multithreading', which presents two "virtual" processors to software application.
Jackson was first referred to by our very own Mike Magee last September here, in a scoop that mentioned multi-threading capabilities being built into Foster, the first chip to be based on Intel's P7 core that's used in Pentium IV. That slide was made public, and then withdrawn, but shortly before Xmas eagle eyed Ace's Hardware discovered that Linux support for processor was brewing. A to-do entry in Red Hat's Enterprise Change Log read:- " Tue Oct 10 2000 ... Adding support for the second logical processor on each physical processor of a Jackson Technology enabled Willamette CPU still needs to be added [sic]". That link from Ace's has also been pulled, but given the persistent nature of Linux change logs (and Google caches) it led to much informed speculation whether Jackson was really a designs big-bang for Intel, or whether it simply represented a way of speeding-up SMP threads across regular Intel boards.
Now from sources familiar with Foster documentation we can confirm that the former is indeed true. Although thermally-concerned Intel Veep Pat Gelsinger dropped a heavy clanger on Monday at the IEEE's ISSCC conference, when he suggested ways microprocessor engineers (read: x86 microprocessor engineers) could avoid a thermal meltdown. Credit to Kicking Pat for his "no more business at usual" pitch. So what's it all about?
It cools while it dusts
SMT really offers an alterative way of spreading the workload. Today's Intel and AMD processors spend energy heating an infrastructure that predicts which way an instruction will go. Only most of that time, that infrastructure sits idle, or gets the answer wrong. Processors are designed against peak workloads, so even if you do very little - or if your workload is utterly predictable - then you're paying for an expensive and redundant insurance policy. SMT assumes programs are that little bit smarter - threads are lightweight processes - and can make more efficient balancing decisions. With SMT, shorter pipelines allow workloads to be spread around execution units without the additional overhead. (Yes that's an idiotic oversimplification - but we're nothing if not idiotic and simple, so mail us your more elegant replies and we'll print them.) Intel says the additional overhead to processor logic is maybe 10pc - but power and other efficiencies mean a 2x increase in thermal output over generations can be reduced to something more like 10pc.
Keep the cache
Nor is SMT exactly new.
Academics finger Burton Smith, CTO of Tera (owners of Cray) as the man wielding the lead pipe in the study. Smith's first public paper on microprocessor threading was published in 1978, and his radical Horizon processor made thread creation simple and cheap: down to as low as an instruction. Work followed by Anant Agrawal's APRIL team. But the term SMT was coined by Dean Tullson in a landmark paper with Susan Eggers and Hank Levy. Smith says their approach - which specifically tackled SMT for commodity processors - was responsible for persuade the industry to see SMT as commercially worthwhile.
Between the first and second papers in 1995, Tullson went East and discussed incorporating SMT into Alpha. We spoke to both Smith and Tullson on Friday, and as these interviews merit a story in their own right. However as Tullson has since also advised Intel on SMT, he can't discuss specifics. Stay tuned.
What's it good for?
Well two chips in one sounds awesome. The only trouble is most of us won't see any direct improvement, unless we're running very predictable technical workloads, or we guess, using BeOS. That's on the client anyhow: applications like Word spool only a couple of threads. On the other hand server applications nab a thread pool, like Windows 2000, or are tuned to handling hundreds or thousands of tasks. So Intel's SMT's chips are (no surprise) targeted at the server. As we wrote last September, the target applicatons are:- "intended for data warehousing, cache servers, ERP and databases, one slide shows". At the time, Intel said it would showcase "Over 20" software applications that take advantage of Jackson SMT. employing Jackson technology will be rolled out at the launch of the processor, another slide reveals.
There's much more chip designers can do, too. Smith's Horizon machine had no cache, and bet that the cost of a roundtrip to main memory would not be judged inefficient. So imagine how cheap microprocessors could be without the on die cache that takes up a large chunk of the transistor space in every chip. But that's enough to boggle over. We'll be back to boggle soon. ®