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AMD drops EV6 for Hammer bus

Going for NUMA instead

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So farewell, then, the EV6 system bus, dropped from AMD's Hammer family of 64-bit processors, but not forgotten.

Instead, AMD will use a new, NUMA-based bus. NUMA (Non-Uniform Memory Access) is designed for multiprocessor system, primarily eight-way and up jobs, so the move - outlined by Bob Mitton, AMD's workstations and servers marketing manager, at the Platform Conference this week - shows what kind of systems AMD expects to see its chips installed in.

NUMA provides each processor with its own memory bank alongside a chunk of shared RAM - specifically, all the other processors' local memory. Each CPU can access its own memory more quickly than the RAM shared with other processors, hence the 'non-uniform' label. It also gives each processor access to the full bandwidth of the system bus. Essentially, it's a technique that provides the simplicity of SMP with the scalability of massively-parallel multi-processing.

AMD's adoption of it marks the chip maker's second appropriation (at least) of a third-party's bus technology, in this case Sequent, which introduced the technology back in 1996. SGI released NUMA-based systems around the same time. EV6 was designed for the Alpha processor.

AMD's contribution to NUMA will be a combined Northbridge and Southbridge part called Lightning Data Transport and not BusNow! after all.

The company's choice of a new bus technology also highlights the problems it has had developing multi-processor boards based on EV6. According to EBN, AMD has begun sampling a two-way Athlon-oriented chipset, the 760MP, but Mitton wouldn't or couldn't say when it would ship in volume. The 760MP will support DDR PC2100 RAM, up to 4GB of it. ®

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