P4 launch now set for end of November
Print storyWeek commencing November 28, to be precise
Posted in Channel, 14th October 2000 08:40 GMT
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More details of Intel's Pentium 4 delay have come to light thanks to an internal document obtained by Digit Life.
The launch date has now reportedly shifted to work week 48, which would place it right at the end of November and the 850 Tehama chipset problem, which affected certain PCI graphics cards, has been identified as an ICH2 erratumnotbug which will be fixed by what Intel call a 'low-risk' stepping, named B1 Prime.
Production of the revised stepping is expected to enter production in the week commencing October 10, with samples available a week later. The stepping will not involve any mobo or BIOS changes, according to the leaked document. Customers are being advised to continue validation on the old B1 stepping until the new part is available.
And some of that good ol' Intel paranoia is reflected in the statement that the glitch does not affect the 810e, 815e or 820e chipsets.
The erratum can result in invalid data being delivered to a PCI master and only occurs in 850/860 systems due to 'unique architectural interactions' between the MCH and the ICH2. The fix ties an existing logic signal in the ICH2 to the buffer invalidate logic and is implemented by what is described as a minor metal layer fix. ®
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