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AMD confirms Corvette plans

Putting all the roadmaps together

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A senior executive at AMD has confirmed that it has plans to release low power mobile versions of its Athlon and Duron processors in the fourth quarter of this year.

But the confirmation, made by Ben Anixter, a VP at AMD, and quoted in news.com, does not provide details of the roadmap, exclusively revealed here in The Register earlier in the year.

While AMD is positioning its current AMD K6-2P chip as its value offering right up until the end of this year, claiming clock speeds of up to 475MHz, a 100MHz front side bus, and double the on chip level one cache compared to Intel's mobile Celeron, its mobile Athlons and Durons will far exceed those specifications.

Its AMD K6-2+ which uses .18 micron architecture, currently clocks at 500MHz and support for PowerNow! -- a battery saving technology which competes with Intel's SpeedStep equivalent. SpeedStep is not yet available in Intel's mobile Celeron category. AMD also wants to capture the low end of the market by providing an ability to remove external level two cache with this processor.

AMD's mobile Duron, which is based on the Spitfire core, will sample in Q3 for production in Q4, and uses a similar infrastructure to the mobile Athlon, although it will be considerably cheaper.

The mobile Athlon, which is code named Corvette, although previously code named Mustang 256, will have integrated full speed level two cache on the die, with a 200MHz S2K interface, which will scale to 266MHz and beyond in the future. It will allow 64-bit data and eight bit ECC, which AMD claims makes it ideal for "commercial platform" support.

The Corvette will require specific Northbridge support, and will also support multiple voltage and frequency states, with 5 bit VID output to control the CPU voltage, and a maximum temperature goal of 95° Celsius.

Come Q4, AMD will release 9xx, 8xx, 700 and 650MHz mobile Athlons using .18 micron technology, and at the same time will release Duron 650 and Duron 600MHz mobile chips, aimed at the "value" notebook sector of between $1,000 and $2,000. We will also see 533MHz K6-2+ and 550MHz K6-2+s, but they will arrive in Q3 (nowish), and will eventually be superseded by the faster Durons.

The picture will change dramatically in Q1 next year. AMD's roadmaps show Athlon mobiles exceeding 1GHz, while the same space in the Duron sector will see the release of the Duron 700.

Unlike Intel, AMD will offer PowerNow technology from the top to the bottom on its .18 micron mobile chips. There are modifications to the K6 core to support these features, with additional pins needed, but there need be no modifications to external bus speeds.

These features will be accessible through the CPU MSR mapped to the IO, according to the roadmaps we have seen.

AMD's roadmap also, as usual, contrasts its mobile Athlon with Intel's Pentium III, claiming it represents the seventh generation of the x86. Most chip architects believe it may be some time before Intel is able to move its "Willamette" Pentium 4 processor into the mobile space.

Again, as sketched out here, we will see at least two mobile chipsets supporting this platform. The Via Mobile KN will start sampling this quarter for production Q4, and supporting 200MHz front side bus, integrated S3 Savage graphics, and PC133/100 synchronous memory.

The Aladdin (Ali) Napa2 (1646M) will also support a 200MHz front side bus, will have integrated UMA graphics, and support PC133/100 or DDR (double data rate memory). This chipset is also slated to sample this quarter for production Q4.

The PowerNow technology for Corvette mobile Athlons is, according to AMD, the second generation implementation of this technology. The CPU in its maximum performance mode runs at normal voltages and frequencies, but in its battery saver mode we can expect to see maximum power of six watts at the lowest clock speed, with that minimum frequency being 300MHz. In automatic mode, we will see a dynamic variation of frequency and voltage based on the CPU load. Clock multipliers will be 3.0X to 12.5X in steps of 0.5X.

The Thresher reference/evaluation platform for its Duron and Corvette mobile chips has already started shipping to its treasured customers. ®

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