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1GHz StrongARM picks up .18 micron features

Dynamic clock speeds, ultra low voltage

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Internet Security Threat Report 2014

Further details have emerged about the next generation of Intel's StrongARM technology after the firm fleshed out future details of its IXA (Internet Exchange Architecture) this morning. Jeff McKeown, marketing manager of the CEG Logic Unit at Intel UK, confirmed that the firm is migrating the StrongARM microprocessor core to .18 micron technology in the second half of this year, and will proliferate the power characteristics of the device to other, appliance specific devices which integrate a number of functions, in the late end and the first quarter of next year. Intel engineers have designated the process 859, in recognition of the .18 technology which has the internal code number 858. According to McKeown, the next generation of StrongARM technology will use superpipelined RISC technology, and have dynamic voltage characteristics which will allow it to change clock speeds more or less on the fly. That, he claimed, will make the core attractive to third parties looking at improving battery life in a number of devices including PDAs, WAP phones and other vertical applications. Dynamic clock speeds were likely to reach 600MHz and above in the next StrongARM microprocessor core, but it is in the area of power requirements and delivery of MIPs that future StrongARMs would appear to excel. The technology allowed Intel to switch clock speeds as required. Products are well en route to achieve voltages as low as 1 and .75 volts, McKeown said. But Intel seems to have temporarily dropped plans to implement StrongARM devices in set top boxes, he admitted, although the technology it developed will be used internally as a "technology vehicle" for future designs. McKeown even held out the allure of StrongARM 2 clocking at 1GHz, but acknowledged that this does not have such a strong marketing message as for so-called classic Intel architecture. Essentially, he claimed, StrongARM 2 will deliver three to four times the performance of existing StrongARM chips, and are likely to be used in voice recognition systems, video applications, and hand held devices. The Intel i960 RISC chip will eventually be phased out in favour of StrongARM devices, he said. Will we see StrongARM implementing x86 instructions? No, said McKeown. But we will see a concerted attempt by Intel to integrate the fast bus StrongARM 2 will use with x86 chips as part of its IXA (Internet Exchange Architecture) push. Further, future iterations of the so-called network chip - the IXP 1200 - will likely use elements of the design work undertaken by Intel architects since it took over StrongARM from Digital (now Compaq). ®

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