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AMD elaborates on MP plans

But no show at CeBIT

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AMD Developer Forum The Register took time out this morning to wander down to AMD's suite at the Palm Springs Hilton and gaze at the Thunderbird systems on show. But the system AMD was showing only clocked 1.1GHz, although we gained some interesting info about the chip company's strategy for multiprocessing. The Thunderbird has integrated cache, and although Mark Bode, division marketing manager of the Athlon product would not be drawn on the size, it is reasonable to suppose that the first iteration will arrive with 256K on die. Further, Bode said: "This will provide a bump in the architecture from the performance perspective and it will be competitive with both Willamette and Coppermine. It's full speed on die cache at full core speed." Systems are likely to be on display at this June's Computex show in old Taipei. Mustang, as we already know, will offer far larger cache sizes. He said that AMD will continue to maintain competitive on clock speeds and performance, and said that multiprocessing systems using dual Athlons at 200MHz were likely to appear in the second half of the year. These machines will not be shown at the up-and-coming mammoth trade show, CeBIT. The chip set for the dual Athlon systems is, as we knew, designed by AMD in cooperation with API, which offers Alpha microprocessors and chipsets, and will use Hotrail technology. It is a subset of API's Tsunami chipset. But AMD seems to be taking a more pragmatic approach with Sledgehammer, its 64-bit processor due in 2001. Bode said that the part will not be targeted simply at the corporate environment, but will bridge both that and the consumer marketplace. ®

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