Scientists at the University of California's Berkeley campus have developed a new transistor design that they claim could allow chip makers to increase the number of such devices on a given slice of silicon fourhundredfold. Full details of the new transistor, called FinFET, will be presented next month, but the device essentially contains a new gate design -- the part of the semiconductor that controls the flow of electrons through the device, and allows it to operate as a switch. In the new design, the gate provides better flow control than before, reducing current leakage and so allowing the transistor as a whole to shrink in size. Currently, the Berkeley team have cut the size of the transistor down to 18nm, ten times smaller than existing chip transistors. Team leader Chen Ming Hu, professor of electrical engineering and computer sciences at Berkeley, believes the new design can be further reduced by a factor of two. With even just 100 times as many transistors per chip (from a ten times smaller transistor), the FinFET design will allow chip makers to significantly improve the functionality of microprocessors, or to shrink chip designs to improve yields and reduce prices. Presumably, existing CPUs will have to be remodelled using the new transistor design, so we're more likely to see the technology used in future parts rather than current ones. Either way, it should ensure that the need to move to the next level of process technology, 0.15 micron, won't have to take place as soon as previously thought in order to maintain the current demand for more and more transistors within each processor. Couple this with other attempts to improve the efficiency of transistors, such as IBM's Silicon on Insulator (SOI) process, and the physical limitations on the development of semiconductors will be reached less quickly than before. Fortunately, all semiconductor manufacturers should benefit. The Berkeley team is not patenting its design in order to allow its widespread use throughout the chip industry. ®