Feeds

IBM 1GHz 64-bit PPC to deliver 11,000 MIPS

Ultra SMP the way to go, says Big Blue

  • alert
  • submit to reddit

Choosing a cloud hosting partner with confidence

More information is leaking out about the next generation IBM PowerPC Power4, the 64-bit chip line formerly known as Gigaprocessor, and due next year at clock speeds of over 1GHz. The first chips will be sub-0.18 micron, with 200 million transistors or more. Power4 will have two microprocessors on a single piece of silicon, and at 1.1GHz should be able to deliver 11,000 MIPS. The architecture comes out of Austin, and chips will be fabbed at the Fishkill Semiconductor Center. With microprocessor performance still increasing much faster than memory hierarchy performance, DRAM latency will grow and bus speed will not keep pace with increases in microprocessor speed. Likewise, circuit density will continue to increase faster than circuit speed. To leverage the circuit density increase, faster uniprocessors with superscalar designs or VLIW and derivatives such as EPIC (explicitly parallel instruction computing, favoured by Intel) are needed. More systems functions and multiple processors on a chip (SMP, co-processors and redundant processors for error detection and fault tolerance) seems to be IBM's preferred route. Whatever the architecture or design, processors spend most of their time waiting for cache misses, so the optimised feeding of processors is the main performance challenge. Software design trends such as OOP and JIT compilation will increase the memory hierarchy load, so the design challenge is to deal with the memory hierarchy bandwidth. IBM says it believes that its approach to parallelism (Ultra SMP) is superior to Intel's EPIC since EPIC increases the demand for memory hierarchy bandwidth and low latency. IBM also claims that EPIC is less suitable for JIT Java compilation as it needs lengthy compilation and a large optimisation window. Another difficulty that IBM identifies with EPIC is in future binary compatibility, resulting in a probable need to recompile. Could it be that a JavaOS will rise again? Explicit parallelism -- Ultra SMP -- is IBM's answer, which it claims exploits existing parallelism in code (and particularly SMP-enabled server applications with multiple threads). The approach allows multiple threads per chip with multiple physical processors, or multiple logical processors with hardware thread switching. Above all, the memory hierarchy would be used more efficiently, IBM says, with less bandwidth for each useful instruction, as well as less cache latency. As a consequence, IBM will preserve PowerPC and S/390 binary compatibility, and optimise for SMP and cluster performance with multiple RISC "cores" per chip, while Intel creates a new IA-64 instruction set architecture and optimises uniprocessor performance. IBM won't have the fastest uniprocessor, but it should do a better job of preserving the software investment. Intel is left with some sticky problems, such as software migration; performance issues with the new architecture; x86 compatibility mode performance; and SMP performance. These puddings aren't yet ready for eating -- and there are other chefs too -- so we'll just have to wait and see which proves tastier. ®

Top 5 reasons to deploy VMware with Tegile

More from The Register

next story
Bladerunner sequel might actually be good. Harrison Ford is in it
Go ahead, you're all clear, kid... Sorry, wrong film
Euro Parliament VOTES to BREAK UP GOOGLE. Er, OK then
It CANNA do it, captain.They DON'T have the POWER!
Musicians sue UK.gov over 'zero pay' copyright fix
Everyone else in Europe compensates us - why can't you?
I'll be back (and forward): Hollywood's time travel tribulations
Quick, call the Time Cops to sort out this paradox!
Megaupload overlord Kim Dotcom: The US HAS RADICALISED ME!
Now my lawyers have bailed 'cos I'm 'OFFICIALLY' BROKE
Forget Hillary, HP's ex CARLY FIORINA 'wants to be next US Prez'
Former CEO has political ambitions again, according to Washington DC sources
prev story

Whitepapers

Free virtual appliance for wire data analytics
The ExtraHop Discovery Edition is a free virtual appliance will help you to discover the performance of your applications across the network, web, VDI, database, and storage tiers.
Getting started with customer-focused identity management
Learn why identity is a fundamental requirement to digital growth, and how without it there is no way to identify and engage customers in a meaningful way.
The total economic impact of Druva inSync
Examining the ROI enterprises may realize by implementing inSync, as they look to improve backup and recovery of endpoint data in a cost-effective manner.
High Performance for All
While HPC is not new, it has traditionally been seen as a specialist area – is it now geared up to meet more mainstream requirements?
Website security in corporate America
Find out how you rank among other IT managers testing your website's vulnerabilities.