MIPS unveils own MMX for 64-bit CPUs

ASE plugs hole in MIPS64's 3D graphics functionality

MIPS today introduced its own version of Intel's Multimedia eXtensions (MMX) and AMD's 3D Now! With the uninspiringly dubbed MIPS-3D Application Specific Extension (ASE). The technology extends the existing MIPS 64-bit architecture with "additional graphics-oriented floating-point instructions that reduce code size in graphics processing algorithms and improve 3D image processing performance". The improvement, MIPS claimed, can be as much as 83 per cent. The technology can generate 25 million polygons per second, falling to ten million polys per second when you add lighting (both on a 500MHz processor). Not bad, perhaps, given that the technology is 13 new instructions the work by pairing up two 32-bit floating-point words and packing them into a single 64-bit register. That's not quite true SIMD operation, but it's clearly close enough for MIPS. And, after all, we're not talking high-end graphics applications here. The real motivation for the development of the MIPS-3D ASE comes from the work MIPS' is doing with 3D graphics specialist ATI to build a set-top box reference design. That already contains ATI's Rage graphics acceleration, so the two technologies will play off each other for even better performance. And MIPS hopes the SIMD functionality will improve its chips' chances in the embedded space, but here it's going up against Motorola's upcoming AltiVec technology, to be included in the PowerPC 7400 (aka G4). That said, MIPS reckons MIPS-3D increases the die size by less than 0.5mm squared, so it probably retains the cost advantage. MIPS-3D ASE will debut in the upcoming MIPS64 20000 CPU. ®

Sponsored: Designing and building an open ITOA architecture