AMD and its Dresden Sandpit: Part II

More copper nuggets from Mittel Europe

Fab 30 seen from the sky: the green bit is the clean room

The good Doktor Hans Deppe, the AMD Geschaftsfuhrer at Fab 30, made it clear, straight away, that he wanted to be open about what the bunnies were doing at the factory. To that end, he said: "It's AMD's policy not to behave like Intel has -- we're very proud of what we've achieved so far." And he was pretty open, although trying to scribble the details was real tricky, especially when he showed complicated slides. Although

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was not allowed to sweat in the clean room, as we did at Intel's Albuquerque facility earlier in the year, Deppe flashed a schematic up on the screen, which we hastily copied.

Forgive my scribbles. In the first box on the left of the diagram is the Polishing stage. BE refers to back end and FE to front end. The next box represents the etch diffusion process and the film etch, with the box above representing the area in the clean room where the photolithography happens. The next box is the implant process, while on the right is AMD's C4 process. This last is the flip chip method, which is better represented by this diagram.

Deppe then showed a very interesting chart demonstrating AMD's roadmap on its technology. My scribble, below, is probably clear enough to read without explanation.

AMD process roadmap

He said that the first full flow lots of the K7 Athlon will start this month, with the first silicon arriving in October/November. AMD is developing .15 micron and .13 micron at the fab too, said Deppe. ".18 micron is on target for the end of this year," he said. "After .15 micron, we'll go to .13 micron and we'll work out the details between Motorola and ourselves". He gave no date for when this process might happen. The copper technology is based on IBM's so-called Damascene technology and that required AMD to buy special tools costing around $6 million to $10 million apiece, he said. AMD has also introduced a CFM (contamination failure management) system, which Deppe dwelled on at some length. Essentially, this is a way of improving yields on the copper-coloured silicon wafers. "We've put together a system to minimise the number of particles on the surface of a chip," he said. "This includes defect inspection tools at $10 million apiece". Part of the CFM process includes review tools. The process also includes the so-called yield management cluster. This shows defect distributions across different wafers. He said the software can filter the different defects and detect what the source of the problems might be. And it seems AMD will have a 1GHz Athlon by the end of the year, if all goes well. He said: "The K7 .18 micron process will arrive at the end of 1999. There is a potential to have greater than 1GHz volume by the end of next year". Fab 30 will reach full capacity by 2002, he said. He said that Fab 30 would produce 5,500 wafer starts a week. At .18 micron, that represents 300 K7s a wafer. The Dresden facility was described in the industry, he said, as a "megafab". Tomorrow we will run through AMD's Material Analysis Lab and tie up the different loose ends, including Kurt Vonnegut's Slaughterhouse Five and the strange story of the real sub-micron organic bug they found on the chip... ®

See also AMD and its Dresden Sandpit: Part I AMD positions K7 Athlon for enterprise AMD succeeds in producing copper K6 AMD brings forward Athlon to 10 August AMD succeeds in producing copper K6 AMD fabs first copper parts, 1GHz Athlon by year end?

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