The latest roadmap from National Semiconductor subsidiary Cyrix has demonstrated the limits of its x.86 ambitions. The company is determined not to be caught in the crossfire as Intel and AMD battle it out during 1999 and next year, the roadmap reveals. Nevertheless, the modest position Cyrix is taking shows it is determined to carry on chipping away at the others. It will produce "entry level solutions that match Intel's midrange characteristics", the roadmap claims. In one slide, Cyrix says: "The MII roadmap matches Intel's Celeron." This quarter, Cyrix will introduce an MII-400 on .25 micron technology, in Q3 it will move its MII-466, MII-433 and MII-400 to .18 micron technology and use what it labels as "industry standard bus speeds". Gobi, with the Cayenne core, is still slated for release in summer 1999, while Mojave, with the Jalapeno core, will appear in summer 2000, according to another slide. Target speeds are 600+MHz, the slides show. The MII-400 will sample in May and reach Volume in June using a 95/285 bus/core model; the MII-433 will sample in June and reach volume in July, using a 100/300 bus/core; while the MII-466 wil sample in August and reach volume in September, using a 95/333 bus/core. These three parts will be 2.2 volts, with clock multipliers of 3.5, 3 and 3.5 respectively. The motherboards, still using socket seven, support 95 and 100MHz front side buses (FSBs). And, for the first time, Cyrix has made a public statement on Slot One and socket 370. One slide says: "Today we support Socket 7. There are no technical or legal barriers to National Semiconductor producing slot 1 or socket 370 based solutions." ®