This is a presentation jointly given by John Crawford, Architect & Intel Fellow at Intel, and Jerry Huck, leading architect at Hewlett Packard at the Intel Developer Forum. Because it is a long presentation, each of the files IA64-1.JPG to IA64-18.JPG contains three slides each. You can see photographs of the Merced package here (http://www.theregister.co.uk/content/archive/3071.html), while our full coverage of the Intel Developer Forum is is here (http://www.theregister.co.uk/content/archive/3078.html). These are the titles of each slide: 1. IA-64 Architecture Innovations 2. Agenda 3. Traditional architectures: limited parallelism File One (http://www.theregister.co.uk/images/adverts/ia64-1.jpg) 4. IA-64: explicit parallelism 5. IA-64: principles 6. Predication File Two (http://www.theregister.co.uk/images/adverts/ia64-2.jpg) 7. Predication review 8. Introducing parallel compares 9. Eight Queens example File Three (http://www.theregister.co.uk/images/adverts/ia64-3.jpg) 10. Eight Queens example 11. Eight Queens example 12. Five predicate compare types File Four (http://www.theregister.co.uk/images/adverts/ia64-4.jpg) 13. Predication benefits 14. Speculation review 15. Hoisting uses File Five (http://www.theregister.co.uk/images/adverts/ia64-5.jpg) 16. Introducing the NaT -- "not a thing" 17. Propagation 18. Exception deferral: more than skin deep File Six (http://www.theregister.co.uk/images/adverts/ia64-6.jpg) 19. Control speculation summary 20. Store barrier 21. Introducing data speculation File Seven (http://www.theregister.co.uk/images/adverts/ia64-7.jpg) 22. Data speculation: uses can be hoisted 23. Advanced load address table: ALAT 24. Architectural support for data speculation File Eight (http://www.theregister.co.uk/images/adverts/ia64-8.jpg) 25. Speculation benefits 26. Agenda 27. Branch instruction File Ninee (http://www.theregister.co.uk/images/adverts/ia64-9.jpg) 28. Branch predicates 29. Compare and branch in same cycle 30. Multi-way branch File Ten (http://www.theregister.co.uk/images/adverts/ia64-10.jpg) 31. Software pipelining 32. Basic loop example 33. Loop support: unrolling File Eleven (http://www.theregister.co.uk/images/adverts/ia64-11.jpg) 34. Software register re-naming 35. Software register re-naming 36. Software register re-naming File Twelve (http://www.theregister.co.uk/images/adverts/ia64-12.jpg) 37. Software register re-naming 38. Software register re-naming 39. Introducing rotating registers File Thirteen (http://www.theregister.co.uk/images/adverts/ia64-13.jpg) 40. Introducing rotating registers 41. Introducing rotating registers 42. Introducing rotating registers File Fourteen (http://www.theregister.co.uk/images/adverts/ia64-14.jpg) 43. Introducing rotating registers 44. Loop support: rotating registers 45. Introducing rotating predicate registers File Fifteen (http://www.theregister.co.uk/images/adverts/ia64-15.jpg) 46. Introducing rotating predicate registers 47. Introducing rotating predicate registers 48. Introducing rotating predicate registers File Sixteen (http://www.theregister.co.uk/images/adverts/ia64-16.jpg) 49. Introducing rotating predicate registers 50. Introducing rotating predicate registers. File Seventeen (http://www.theregister.co.uk/images/adverts/ia64-17.jpg) More on rotating predicate registers File Eighteen (http://www.theregister.co.uk/images/adverts/ia64-18.jpg) ®