Chip Goliath Intel claimed this morning that its 0.18 micron technology is really 0.13 micron technology and that puts it ahead of the chip rat-pack. Said Pierre Mirjolet, architecture marketing manager at Intel's European HQ in Munich: "The 0.18 micron generation is a path set up by the industry. We're achieving better performance than that. In actual fact, our 0.18 micron performance is 0.13 micron performance." He said: "We're able to get a little bit more out of 0.18 micron technology. We're moving faster than the industry. You can say [in Intel's case] that 0.18 micron is 0.13 micron." He continued: "We'll use shallow trench isolation in the P858 to increase the densities. The minimum gate dimension is .13 micron." Different chip manufacturers measured things differently, he conceded. "0.13 micron is the width of the gate travelling from the source to the drain," he said. Mirjolet cited the proceeds of the IEDM as proof of his pudding. He produced a tabulation in his presentation. Intel has gate oxide thickness of 3.0, transistor NMOS of 850, and current PMOS of 380. He was unable to say which companies A, B and C referred to for legal reasons, but pointed us to pages of the 1998 IEDM report page 623, page 627 and page 1013. If anyone has this IEDM report, maybe they'd like to tell us so we can identify these companies A, B and C. We've got the slide presentation and will put up selected pages from it tomorrow -- if anyone is interested. ®