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NatSemi research project to tackle spiralling chip fab costs

Smaller chips equals more defects, so US cost-control project kicks off

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NatSemi has been selected as the lead company in a US industry/university research consortium aimed at improving chip yields and reducing costs. The three year programme is being funded to the tune of $18.6 million by the US National Institute of Standards and Technology (NIST), and aims at restoring the historical 25-30 per cent annual reduction in cost per function of semiconductors. Manufacturers can no longer expect these reductions automatically as chips are shrink to 0.18 micron and beyond, and feature size becomes more difficult to control. The lack of uniformity being introduced increases defects, and therefore reduces yields. The results of the programme will be available to the whole US semiconductor industry, and will concentrate on the patterning process. This is the stage where photolithography is used to place circuit layers on the chip, and the goal of the research is to make features more uniform. Critical Dimensions (CDs, or geometries) will be measured after the photolithography step so that process managers can make changes in the next step to increase yields. According to NatSemi this is critical, as the company has already narrowed variance at one of its own plants by 40 per cent. ® Click for more stories

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