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Intel moves to reassure industry on bugs

Erratumnotbug policy in place, company claims

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Intel has admitted that it is impossible to prevent bugs from escaping its testing process. But today it moved to reassure end users and customers that its bug testing process is up to the task of dealing with the complexity of this and future generations of its microprocessors. That follows bad publicity given to Intel earlier this year over an erratum with its Xeon line of server chips. John Barton, validation manager at Intel US, said: “Over time it has become obvious that validation is a crucial part of our success. We spend millions of dollars on validation and we don’t take it lightly.” Barton claimed that Intel had developed a three tiered process to sift out as many problems as it could, using a combination of test suites, feedback from OEMs, ISVs and other partners, and end users. He said: “It’s our job to do our level best that errata and escapes are not fatal to prodicts. If it happens, Intel will make good on it. It’s obvious we cannot completely guarantee any of our products will be completely free of errors.” He claimed that his testing unit has the specific job of looking at designers’ work and testing it to destruction, if that is possible. If what Intel describes as “a sighting” – a report of a bug – is notified to them and it is found it is a serious problem, Barton said it gave its major OEM customers one month’s notice. But he also claimed that built into its P6 architecture was a method of implementing some fixes through altering microcode. That is what happened with the Xeon problem and Intel was able to fix it quickly. He said the technology was proprietary to Intel. ®

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